This invention relates to memory in semiconductor devices. More particularly, the present invention relates to a system and method for operating memory cells requiring bipolar programming in a three-dimensional array.
A central problem associated with present volatile and non-volatile memory devices is that peripheral circuitry provides a large area overhead on the semiconductor memory chip, which results in less space available for the memory cell array. For example, past solutions for implementing more efficient memory devices involved utilizing multiple semiconductor chips to fashion the memory device or stack bipolar memory cells on top of each other. These solutions, however, regularly experience problems with significant wiring.
Nonvolatile memory solutions are a growing focus for the next generation of memory systems. Where present floating-gate transistor based non-volatile memories satisfy many current enterprise and consumer needs, exponential growth in the amount of digital data generated in the information industry requires next generation of semiconductor memories to increase memory densities while reducing cost.